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[VHDL-FPGA-Verilog] PS2-IP-CORE-VHDL

Description: 一个PS2 IP CORE(VHDL) for FPGA-A PS2 IP CORE (VHDL) for FPGA
Platform: | Size: 26624 | Author: nanotalk | Hits:

[VHDL-FPGA-Verilog] vhdl_rs232

Description: 使用FPGA透过RS232与PC的作沟通，
Platform: | Size: 3072 | Author: 苏山河 | Hits:

[VHDL-FPGA-Verilog] box

Description: 用vhdl语言编写的基于fpga的波形发生器，使用了quartusII程序。可以在1602液晶显示器上显示目前的波形种类。产生的波形分别是正弦波，三角波，锯齿波和方波。-VHDL language using FPGA-based waveform generator, using the procedures quartusII. 1602 liquid crystal display can show the current waveform types. Generated waveforms are sine wave, triangle wave, sawtooth and square wave.
Platform: | Size: 1708032 | Author: zhg | Hits:

[Other systems] fpga+1602

Description: 本程序用VHDL语言编程实现FPGA对点阵液晶1602的驱动 -This procedure using VHDL language programming FPGA to realize the 1602 dot-matrix LCD driver
Platform: | Size: 1024 | Author: pdu | Hits:

[VHDL-FPGA-Verilog] lcd

Description: 用FPGA来控制2*16LCD的程序，采用VHDL语言来编写，并且我把他转换为verilog语言，有意者请联系；
Platform: | Size: 1024 | Author: 赵雯 | Hits:

[VHDL-FPGA-Verilog] FPGA+DSS+UART

Description: 用FPGA实现任意波形发生器的源代码，另外还包括FPGA实现UART，从而与MCU实现串行通信。-Using FPGA to achieve arbitrary waveform generator of the source code, including the FPGA also realize UART, in order to realize serial communication with the MCU.
Platform: | Size: 2048 | Author: zhuangxb | Hits:

[VHDL-FPGA-Verilog] vhdl--timer

Description: 关于基于fpga的，数字化时钟vhdl实现源程序，推荐大家下载仿真实现。-On the FPGA-based, digital clock source VHDL realize recommend everyone to download simulation.
Platform: | Size: 6144 | Author: sxd | Hits:

[VHDL-FPGA-Verilog] HighSpeedAD

Description: FPGA的高速数据采集程序的编写,VHDL语言-FPGA
Platform: | Size: 109568 | Author: huang | Hits:

[Software Engineering] VHDL

Description: 本系统使用VHDL语言进行设计，采用自上向下的设计方法。目标器件选用Xilinx公司的FPGA器件，并利用Xilinx ISE 7.1 进行VHDL程序的编译与综合，然后用Modelsim Xilinx Edition 6.1进行功能仿真和时序仿真。-The system design using VHDL language, using top-down design method. Selection of the target device Xilinx
Platform: | Size: 297984 | Author: 西西 | Hits:

[VHDL-FPGA-Verilog] OFDMRxSynchronization

Description: 使用FPGA設計WiMax接收機之OFDM同步硬體電路(內附VHDL code)-WiMax receivers using FPGA Design OFDM synchronization of hardware circuit (with VHDL code)
Platform: | Size: 126976 | Author: 蔡宗軒 | Hits:

[Embeded-SCM Develop] EXPT12_12_VGAgame

Description: 基于fpga和sopc的用VHDL语言编写的EDA的PS/2鼠标与VGA控制模块-FPGA and SOPC based on the use of VHDL language EDA s PS/2 mouse and VGA control module
Platform: | Size: 29696 | Author: 多幅撒 | Hits:

[SCM] ep1c6_12_1_2_moto

Description: 基于fpga和sopc的用VHDL语言编写的EDA步进电机驱动控制-FPGA and SOPC based on the use of VHDL language EDA stepper motor driver control
Platform: | Size: 87040 | Author: 多幅撒 | Hits:

[Other] CORDIC_VHDL

Description: 用cordic算法来实现求解正弦,余弦及反正切的FPGA实现原代码-CORDIC algorithm used to achieve the solution of sine, cosine and tangent of the FPGA to achieve the original code
Platform: | Size: 427008 | Author: 汤文森 | Hits:

[Other Embeded program] DDram

Description: 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码-07 National Undergraduate Electronic Design Contest winning entries C title peripheral interface FPGA dual-port RAM part of source
Platform: | Size: 1024 | Author: SRY | Hits:

[VHDL-FPGA-Verilog] wp_max_flash

Description: FPGA中FLASH配置控制源码,VHDL和Verilog-FPGA source code in the FLASH configuration control, VHDL and Verilog
Platform: | Size: 37888 | Author: wanggui | Hits:

[Embeded-SCM Develop] vspi_VHDL

Description: FPGA/CPLD VHDL语言实现SPI，拥有两种模式，FPGA/CPLD即可工作在主机模式，又可工作在从机模式 -FPGA/CPLD VHDL language SPI, have the two models, FPGA/CPLD can work in host mode, but also work in slave mode
Platform: | Size: 248832 | Author: 张焱 | Hits:

[VHDL-FPGA-Verilog] VGA_example

Description: FPGA/cpld 控制显示器显示 VHDL源码 内有测试程序-FPGA/cpld control display VHDL source code, there are test procedures
Platform: | Size: 963584 | Author: 张焱 | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 有人用FPGA控制过液晶屏吗（vhdl)-err
Platform: | Size: 9216 | Author: zyc | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: VHDL硬件描述语言与数字逻辑电路设计——学习FPGA/CPLD时可参考-VHDL hardware description language and digital logic circuit design- to learn FPGA/CPLD can reference
Platform: | Size: 18691072 | Author: 陨星 | Hits:

[Software Engineering] FPGA

Description: 系统应用FPGA技术，通过VHDL编程，在CPLD上实现。电子琴的基本原理是产生各个音符对应的频率，将频率放大后驱动喇叭发出音响。该电子琴包括手动弹奏与自动演奏两种功能，其中手动弹奏时还可录音回放。文中叙述了电子琴的设计原理和分块实现的方法，详细介绍各模块的设计及模块之间的连接组合方法，还包括电子琴的使用说明。-System FPGA technology, the adoption of VHDL programming, to achieve in the CPLD. The basic principles of flower is the corresponding frequency of each note will be the frequency of enlarged issued after the driver speaker audio. Playing the organ, including manual and automatic playing two functions, which also play recordable playback manually. The paper describes the design of flower and block the realization of the principle of the method, details of the module design and module combination of the connection between the methods also include the use of electric piano note.
Platform: | Size: 49152 | Author: 严术骞 | Hits:
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